Released Date: 4/17/2024
Verilog Model Revision: 3.1
Parallelx16 Space Grade Datasheet Reference: revision U

Changes:
Add ADDR control for read access


Released Date: 10/02/2024
Verilog Model Revision: 3.2
Parallelx16 Space Grade Datasheet Reference: revision U

Changes:
Add CE control for write access


Released Date: 10/07/2024
Verilog Model Revision: 3.3
Parallelx16 Space Grade Datasheet Reference: revision U

Changes:
Update timing access for write


Released Date: 01/26/2026
Verilog Model Revision: 3.4
Parallelx16 Space Grade Datasheet Reference: revision U

Changes:
Update the signal counters in case of signal change async toggling